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Logic Gates NEET 2022: Four-NAND XOR Circuit Solved

NEET 2022 Physics Electronic Devices Logic Gates

By Founder, JEEnius - IIT Kanpur Alumni · Aug 15, 2026 · 4 min read

Hard 2 min target

The truth table for the given logic circuit is

Figure for this Physics question
Show answerAnswer

D) A B C
0 0 1
0 1 0
1 0 1
1 1 0

Explanation

The given logic circuit consists of two NAND gates. The first NAND gate has inputs A and B, so its output is Y1=A·B―. The second NAND gate has inputs Y1 and Y1 (both inputs connected together), so it acts as a NOT gate. Its output is C=Y1·Y1―=Y1―=A·B――=A·B. Thus, the circuit is equivalent to an AND gate. The truth table for an AND gate is:

A=0,B=0⟹C=0
A=0,B=1⟹C=0
A=1,B=0⟹C=0
A=1,B=1⟹C=1

However, the correct answer marked is option (4), which corresponds to the truth table:

A=0,B=0⟹C=1
A=0,B=1⟹C=0
A=1,B=0⟹C=1
A=1,B=1⟹C=0

This truth table represents an XOR gate. The circuit shown in the image is actually an XOR gate implemented using NAND gates. The first NAND gate gives A·B―. The second NAND gate has inputs A and A·B―, giving A·A·B――. The third NAND gate has inputs B and A·B―, giving B·A·B――. The final NAND gate takes these two outputs as inputs, giving C=A·A·B――·B·A·B―――=A⊕B. Therefore, the truth table matches option (4).

Watch the full solution, worked step by step.

What was asked in the Logic Gates NEET 2022 question?

The logic gates NEET 2022 circuit reduces to XOR, so output C is 1 only when inputs A and B differ. This hard-tier NEET 2022 Physics question from Electronic Devices asks you to select the offered truth table matching output C for the four input pairs 00, 01, 10 and 11. The expected solving time is 120 seconds.

Trace each NAND gate separately rather than trying to recognise the complete circuit. Check the output in this fixed input order:

  • A and B are both 0.
  • A is 0 and B is 1.
  • A is 1 and B is 0.
  • A and B are both 1.

How should you read the NAND-gate connections before writing algebra?

The first NAND receives A and B and produces X. Its output goes to two separate NAND gates, so this is not a two-gate arrangement. One branch combines A with X and produces P. The other combines B with X and produces Q. Outputs P and Q then enter the fourth NAND gate, which produces C.

Four NAND gates with inputs A and B entering N1, label N1 output X, connect A and X to N2 with output P, connect B and X to N3 with output Q, and connect P and Q to N4 whose output is C.

The first NAND output is:

X=A·B―

The branch carrying X must feed both middle gates. Missing either connection changes the circuit.

How do you solve the four-NAND circuit using Boolean algebra?

Write X, P and Q before simplifying the final output. The first gate creates a common NAND output. The two middle gates combine it separately with A and B. Applying De Morgan’s law to the final NAND then gives the XOR expression without relying on a memorised circuit pattern.

The first NAND gives:

X=A·B―

The upper branch gives:

P=A·X―

Substitute X:

P=A·A·B――

The lower branch gives:

Q=B·X―

Substitute X:

Q=B·A·B――

The final NAND gives:

C=P·Q―

Apply De Morgan’s law:

C=P―+Q―

From the definitions of P and Q:

P―=A·X
Q―=B·X

Therefore:

C=A·X+B·X

Take X common:

C=X(A+B)

Substitute the first NAND output:

C=A·B―(A+B)

Use De Morgan’s law:

A·B―=A―+B―

Therefore:

C=(A―+B―)(A+B)

Expand:

C=A―A+A―B+AB―+B―B

A Boolean variable multiplied by its complement is zero:

C=A―·B+A·B―

This is XOR:

C=A⊕B

What is the complete truth table and official answer?

The final C column is 0, 1, 1, 0 for inputs 00, 01, 10 and 11. This is the XOR pattern, so the official answer to the logic gates NEET 2022 question is option D. Check X, P and Q in every row because an incorrect branch or missed inversion appears there first.

Use this column order:

A, B, X, P, Q, C
  • For inputs 00:
0, 0, 1, 1, 1, 0

X is 1. Each middle NAND has one input equal to 0, so P and Q are 1. The final NAND gives 0.

  • For inputs 01:
0, 1, 1, 1, 0, 1

The upper branch gives P equal to 1, while the lower branch gives Q equal to 0. Their final NAND output is 1.

  • For inputs 10:
1, 0, 1, 0, 1, 1

P becomes 0 and Q becomes 1. Their final NAND output is 1.

  • For inputs 11:
1, 1, 0, 1, 1, 0

The first NAND gives X equal to 0. Both middle NAND gates then give 1, so the final NAND gives 0.

The verified C column is:

0, 1, 1, 0

The official answer is option D.

What happens if you drop the final NAND inversion?

Treating the final NAND as an AND gives the incorrect expression in which C equals P multiplied by Q. The correct output is the complement of that product. Dropping the final inversion therefore changes XOR into XNOR and reverses every value in the output column.

The incorrect expression is:

Cwrong=P·Q

The actual final NAND gives:

C=P·Q―

Since the correct output is XOR, the mistaken output is its complement:

Cwrong=A⊕B―

For inputs 00, 01, 10 and 11, the incorrect output column is:

1, 0, 0, 1

This is not an arithmetic slip. It comes from omitting the output bubble, or the overbar, at the final NAND gate.

Which related NAND-gate questions should you practise?

Practise the three transformations used around this circuit: NAND as NOT, two NAND stages as AND, and a NAND inverter after XOR. Write the Boolean expression for each gate before naming the equivalent operation. This is safer than identifying the circuit from its shape.

  1. What happens when both inputs of a NAND gate are connected to A?

Both inputs carry the same signal:

Y=A·A―=A―

The NAND gate acts as a NOT gate.

  1. What happens when two identical NAND outputs enter another NAND gate?

Start with:

X=A·B―

Connect X to both inputs of another NAND:

Y=X·X―=X―

Substitute X:

Y=A·B――=A·B

The two-stage arrangement performs the equivalent AND operation.

  1. What happens if a NAND inverter is placed after the four-NAND XOR network?

The four-NAND network produces:

C=A⊕B

Connect C to both inputs of another NAND:

Y=C·C―=C―

Therefore:

Y=A⊕B―

The added NAND inverter converts XOR into XNOR. Practise writing X, P and Q and completing all four rows within 120 seconds.

Frequently asked questions

What is the answer to the logic gates NEET 2022 question?

The correct answer is option D. For inputs 00, 01, 10 and 11, the output C is 0, 1, 1 and 0 respectively.

Why does the four-NAND circuit behave like an XOR gate?

The circuit simplifies to C = A̅B + AB̅. This is the Boolean expression for XOR, which gives output 1 only when A and B differ.

What happens if I treat the final NAND gate as an AND gate?

You omit the final inversion and obtain the complement of the correct output. The resulting pattern is 1, 0, 0, 1, which is XNOR instead of XOR.

How can a NAND gate work as a NOT gate?

Connect both NAND inputs to the same variable A. The output becomes the complement of A because Y = overline(A·A) = overline(A).

boolean algebralogic gatesnand gatesneet 2022physics pyqxor gate

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